1. Technical Field
The present disclosure relates generally to information processing systems and, more specifically, to spawning and management of low-overhead concurrent threads.
2. Background Art
An approach that has been employed to improve processor performance is known as “multithreading.” In software multithreading, an instruction stream is split into multiple instruction streams that can be executed in parallel. In one approach, multiple processors in a multi-processor system may each act on one of the multiple threads concurrently.
In another approach, known as time-slice multithreading, a single processor switches between threads after a fixed period of time. In still another approach, a single processor switches between threads upon occurrence of a trigger event, such as a long latency cache miss. The latter approach is known as switch-on-event multithreading.
Traditionally, the trigger event for switch-on-event multithreading is hardwired. However, it would be desirable for the programmer or user to specify any of a variety of triggering events to trigger a thread switch on a single processor. Embodiments of the method and apparatus disclosed herein address this and other concerns related to multithreading.